[LOCKSUIT]

Really!?

Maybe. I'm researching it a bit. I have 2 good ideas.

I read this:
https://b1391bd6-da3d-477d-8c01-38cdf774495a.filesusr.com/ugd/56440f_2e6113c60ec34ed0bc2035c9d1313066.pdf?fbclid=IwAR1yY-JSOSL1uRw6td5-Qyfsp-lpQhFTGdXcy1TUQlgpbzDQ2c499lVE4_8

Let me know if I'm correct, or where wrong, The RAM sends its bits to the CPU and the assembly codes recognized are making the ALU do if-then math, like adding/moving +/- numbers, and doing yes/no rules? It also stores and recalls values. And has counters for Reset, Next, GoTo address. There's synchronization, clocking, and feedback loops. Where does the million transistors for a CPU come in?? Seems very parallel like a GPU to me.

[LOCKSUIT]

https://en.wikipedia.org/wiki/Turing_machine

[AndyGoode]

Below is what the 'dilution refrigerator' [cooling unit] looks like for a universal quantum computer, in appearance and schematic.





Of course you could always go for an adiabatic quantum computer and get it down to this size, for a few million bucks...



Let us know when you come back down to earth.

[LOCKSUIT]

I'm looking at using the Turing Machine as my base:
https://www.cl.cam.ac.uk/projects/raspberrypi/tutorials/turing-machine/one.html

[LOCKSUIT]

Ok I understand the Turing Machine FINALLY. If this is all that is needed, and a CPU is sequential, then why does a modern processor run any faster if it MUST do these elementary Turing functions? CPU is actually parallel!!??

And again, why do we need this AND/OR/NOR gate setup? Is this just making the common functions available instead of turing em each every time?
https://b1391bd6-da3d-477d-8c01-38cdf774495a.filesusr.com/ugd/44046b_f2c9e41f0b204a34ab78be0ae4953128.pdf



It seems like a computer has a data, program, hardware ALU with control/decoder unit (just makes common tasks fast?). The buses are data, control, and address. Every input program has an output result is key here.

[AndyGoode]

Ok I understand the Turing Machine FINALLY. If this is all that is needed, and a CPU is sequential, then why does a modern processor faster if it must do these Turing functions I'll call them? It's actually parell?

Now you're starting to understand not only Turing machines, but you're also starting to understand why I emphasize the word 'efficiently' in my definition of intelligence. If all else is the same, faster is better. Modern digital computers use a huge number of tricks for extra speed--registers to hold common values, cache memory, parallel processors, firmware, vector processors, pipelining, and so on.

That said, Turing machines are not a practical model for computing. As an engineer and a Mathematica user, they shouldn't concern you at all. Even in the theoretical computer science community, the more realistic RAM machines are used in the areas of algorithms and data structures.

https://cs.stackexchange.com/questions/9341/practical-importance-of-turing-machines

[LOCKSUIT]

No but seriously, I thought a CPU meant it goes through each bit (or byte at least) of the stored program, one at a time. To be so faster than a Turing tape it appears to me a CPU looks at 800 bytes in parallel???

[LOCKSUIT]

Or I forgot, a program file can loop, and over the data as well......but still....if the CPU looks at more than 1 bit/byte at a time that is cheating, its not sequentially by any means I think....

[LOCKSUIT]

For example, why does a CPU have billions of transistors????? Really? Think about it now. That's very parallel no?

[AndyGoode]

No but seriously, I thought a CPU meant it goes through each bit (or byte at least) of the stored program, one at a time. To be so faster than a Turing tape it appears to me a CPU looks at 800 bytes in parallel???

I'll go by memory now, since my Internet connection is acting up. A program is stored in a certain region of RAM, and each instruction of the program is loaded one at a time. The hardware knows from the instruction code how many arguments the instruction will hold, and where they are stored, so there are typically lines that operate in parallel to pull those arguments out of the bit representation of that instruction. Those arguments are then sent to the proper part of the ALU of the CPU, if applicable, for the math to be done. For example the instruction 'ADD 2 3' will always have two arguments, a fact that the computer knows by the binary equivalent of the ADD instruction in machine code, those argument values [in this case, 2 and 3] are then sent to say registers A and B, then those values are added by the hardware when the proper clock cycle comes around--when it's 'their turn'.

http://www.science.smith.edu/dftwiki/images/thumb/e/e8/SCS_Load7_binary.png/300px-SCS_Load7_binary.png

[Korrelan]

45 year old 8008 processor die... really simple by today's standards...

http://www.righto.com/2016/12/die-photos-and-analysis-of_24.html

You can drag, rotate and zoom on the processor simulation whilst it running.. cool.

http://visual6502.org/





 

[HS]

Someone had to make that! SOMEONE HAD TO, to.. to... AUGHHHHHHH... Just the thought of it    now I get why they called it a die.

[LOCKSUIT]

Ok I look extra dumb don't I, but watch me find some easy peasy way to do it, just u wait. I have 3 wicked plans and a imaginary Turing tape.

I love it when I find out there was a very very VERY easy way to do something. These short cuts exist. You gotta look. I'm a hardcore extremist cyborg!! ;x

[goaty]

Good luck locky with the quantum computer,  if u or I ever get it working maybe we can share info with each other,  ill give you 5 years to do it since u only little young woodpekker. 

Yeh cpus do one instruction at a time,  so get the clock speed * it by the bus, and then you divide it by how many and masks and bitshifts it takes to get through the program, and only then do you get the frame rate.

if the entire logic of the program is in hard one shot,  then you get the clockspeed without the extra cost divide,   and that would be a lot faster.

Even gpu's have to only run one instruction a time, per core, effectively, so even they suffer the same divide on the fps.

However... if you have kickass ultimo power hz the full hard logic at the clockspeed, the frame rate is the clockspeed,   if that were say one raystep in a raytracer,  youd get a billion bounces over the whole screen.  (so 512x512 res x 1024 parallel cone rays per bounce x 4 bounces- for extreme hardware raytracing.)

If u ever got that to work, try not to go crazy - anyone can go get souped hardware, it could be anyone, so its not that exciting, but its doing a good job.

[AndyGoode]

but watch me find some easy peasy way to do it, just u wait.

Of course biological brains came up with an easy peasy hardware solution to solve the practical problems of everyday life. Brains used only one basic component, the neuron, allowed many of them to fire at one time [no more awaiting your turn for the appropriate clock cycle], and there was enough parallelism so that neurons killed by alcoholism [evidently a natural affliction of all intelligent beings] could be bypassed, and voilà, the system worked pretty well. Of course there were a few details to be worked out, like figuring out which neurons needed to be modified, the eventual result of which was 10^4 different types of neurons grouped into 3-4 categories...

https://www.reference.com/science/three-types-neurons-functions-7638703b72243eca
https://qbi.uq.edu.au/brain/brain-anatomy/types-neurons

...that took a few million years to develop and test, but what's a few million years among friends?